Power amplifiers account for a significant portion of the capital and operational expense in current wireless base station designs. One method of reducing this expense is to increase the overall efficiency of these amplifiers. In order to obtain high-efficiency amplifiers, one approach which has been tried is to modulate the amplifier's PSU (power supply unit) in order to track the input envelope of the modulated signal. This in turn requires that one must have a high-efficiency PSU which supports the desire to modulate the PSU, while at the same time, does not introduce any impairments into the main signal path.
A number of high-efficiency architectures have been proposed, particularly in the audio field. However, these architectures typically consist of a single phase and are not capable of supporting the power levels and input bandwidths required for RF applications.
Improvements in efficiency of power amplifiers would benefit low-frequency, high-frequency and radio-frequency amplifier applications.
Sigma-Delta modulation allows noise shaping such that the noise of the modulated signal lies mostly out-of-band. Filtering off the out-of-band noise substantially restores the original signal. See for example Sharp “An Overview of Sigma-Delta Converters”, (IEEE Signal Processing Magazine, January 1996), SM-SX1 Sigma-Delta Audio Amplifier (IEEE Spectrum, March 2000), “Bandpass delta-sigma class-S amplifier”, Electr. Letters, Vol. 36, No. 12, June 2000, “Linear High-Efficiency Microwave Power Amplifiers Using Bandpass Delta-Sigma Modulators”, Jayaraman et al., IEEE Micr. & Guided Wave Letters, Vol. 8, No. 3, March 1998, “Linear Amplification by Sampling Techniques: A new application for Delta Coders”, Cos, IEEE Trans. Comm., Vol. Com-23, No. 8, August 1975. Conventional applications for Sigma-Delta modulation have focussed on analog inputs, and have produced single-bit outputs only. Single bit systems require a very high over-sampling rate to achieve acceptable performance. Multi-bit Sigma-Delta modulators have also been proposed. Sigma-Delta modulation takes an input signal and converts it to an N-level quantized Sigma-Delta signal. The input signal can be in the form of an analog signal or a digital signal.
Sigma-Delta modulation techniques have also been applied in digital to analog conversion. Conventional Multi-bit Sigma-Delta digital to analog converters utilize a multi-bit quantizer to drive a feedback loop and a final digital to analog conversion stage (see P. Aziz, R. Sorensten, and J. van der Spiegel, “An Overview of Sigma-Delta Converters”, IEEE Signal Processing Magazine, January 1996, pp. 61–84, for example). In the case of a two level Sigma-Delta modulator, the quantizer and the output digital to analog converter (DAC) may be merged as a comparator. Although two level quantizers possess desirable features of simplicity and inherent linearity, a two level quantizer significantly limits achievable performance in terms of loop stability, output noise level, signal-to-noise ratio (SNR) and dynamic range.
Multi-bit quantizers may offer an improvement in the achievable SNR of 6 dB per bit and improve the maximum input signal level while maintaining loop stability. Together, this results in a significant improvement in SNR and dynamic range performance. The main trade-off is that the DAC required to convert the multi-level output is not inherently linear and must be as good as the target output performance.
For example, if a Sigma-Delta modulator is designed to achieve 16 bit performance, the output DAC would have to achieve this level of performance (accuracy of levels, etc.), even though it might only have a small number of bits (i.e., 2–5). This leads to significant complications and limitations in the development of high performance, high frequency, multi-bit Sigma-Delta digital to analog converters.
Additionally, the multi-level analog output limits the applications of the converters. In high power applications such as in audio or RF amplifiers for instance, it is desirable to use two level outputs to drive switching power stages to achieve high efficiency. This limits the application of Sigma-Delta modulators to single bit quantizers. In M. Neitola, A. Kivi, and T. Rahkonen, “Design of a Wideband Transmit Delta-Sigma DAC”, IEEE Conference on Electronics, Circuits, and Systems, September 2001, pp. 1053–1056, for example, a final DAC is used even when an experimental platform, a Field Programmable Gate Array (FPGA) in this case, is entirely digital. Other approaches attempt to address the issues surrounding multi-bit linearity in the output stage in Sigma-Delta DACs, but similarly fail to overcome the above limitations. One such approach is described in T. Shui, R. Schreier, and F. Hudson, “Mismatch Shaping for a Current-Mode Multbit Delta-Sigma DAC”, IEEE Journal of Solid-State Circuits, Vol. 34, No. 3, March 1999, pp. 331–338.